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    Overview :: News :: Downloads :: Tracker :: Discussions (cores)    

    Zet - The x86 (IA-32) open implementation: Overview

    Details

    Name: zet86
    Created: 03-Jul-2008 08:24:14
    Updated: 25-Nov-2008 20:13:46
    CVS: browse

    Other project properties

    Category :: Microprocessor
    Language :: Verilog
    License :: GPL
    Phaze :: FPGA proven
    Standard :: Wishbone compliant core
    Development status :: Alpha

    Project maintainers

  • Zeus Gómez Marmolejo
  • Statistics

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  • News

    • 25-Nov-2008. After some code cleanup and bug fixes, I'm releasing the 0.1 version. It's available in the Downloads section. Also, the Zet forums have been opened, so we can discuss future work and ports to other boards.

    • 10-Nov-2008. We have reached a big achievement!! Zet processor can boot now MS-DOS 6.22 and FreeDOS 1.1 both unmodified, see the Pictures page showing how they boot and execute some commands. There is also a very simple Installation guide if you have the Xilinx ML-403 Board.

    • 8-Nov-2008. Who said that it would be impossible to boot MS-DOS without a DMA controller? I think here somebody owns me a beer!! You should check some pictures I've taken...
    • 19-Oct-2008. The VGA BIOS and ROM BIOS used in the Bochs IA-32 emulator has been partially adapted to Zet. Some functions of int 10h are working and we can see the first booting messages on screen (see the image).
    • 16-Oct-2008. A misinterpretation of the Wishbone protocol has been corrected. Now the core should be fully compatible with the Wishbone master single read/write and block read/write modes.
    • 11-Oct-2008. I'm very proud to announce that the 16 bit part is finished and all the 8086 instructions are implemented. Development will move now to have an usable BIOS and show the firsts BIOS messages on screen.

    Status

    This project is being developed using the Xilinx ML-403 Evaluation Board and it's in a very early stage of development. A minimal IBM PC system is also being developed to boot FreeDOS.

    The documentation is held in an external wiki at zet.aluzina.org. This page will be updated only for major achievements. You can browse some Test examples that can be run successfully in the processor.

    FPGA port of the IBM PC system


    The most challenging part of the project is the development of the IBM PC main components: disk controller, DMA interface, etc...

    Currently, there are some parts already done:

    • Real mode part of the Intel x86 processor (16 bit).
    • LCD controller operating at 80x25 text mode.


     

     
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