socgen :: Overview

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Details

Name: socgen
Created: Mar 9, 2010
Updated: Apr 4, 2010
SVN Updated: Jun 19, 2010
SVN: Browse
Latest version: download
Statistics: View

Other project properties

Category: Testing / Verification
Language: Verilog
Development status: Alpha
Additional info: none
WishBone Compliant: No
License: LGPL

Description

opensource eda design for reuse toolset

Installation and usage

To try out the socgen design environment you must first download the project:


svn co --username [user] --password [passwd] http://opencores.org/ocsvn/socgen/socgen/trunk socgen

look in socgen/doc/install and install any or all tools that you need. You will also need to copy all files from socgen/bin into your local bin directory.


go to the directory that contains socgen and create a design by typing:


> build_cmp socgen
> cd socgen_cmp
> make all


This should create a composite directory , build all rtl files, compile all sw programs, run a test suite, synthesis a fpga and create a bit
file for a digilent Basys board.



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