Name: hamming_decoder_and_encoder
Created: Jan 29, 2010
Updated: Feb 2, 2010
SVN: No files checked in
Category: Arithmetic core
Language: VHDL
Development status: Alpha
Additional info:
none
WishBone Compliant: No
License: LGPL
This project consists of two modules which work together: the hamming-encoder and the hamming-decoder. Both modules are combinatorical networks.
Hamming-Encoder:
Input a 32-bit wide data word to the encoder, and the encoder puts 6 paritiy bits to the data bits and 2 additional overall parity bits. The outcoming data word is coded and has a width of 40 bits. It is resistent to a single bit error (will be corrected by the decoder) and even if 2 bits are damaged, the decoder is able to recognize this.
Hamming Decoder:
Feed a 40 bit wide coded word to this decoder, it will read the parity bits and will compare it to calculated parity bits. If there is no error or a single bit error (means that one bit of the incoming 40-bits has not its original value), the decoder will correct the failure and will output a corrected data word. If there are two bit errors, the error-flag goes high to indicate that a not correctable failure is detected. If there are more than 3 bit errors, the decoder is not longer able to check if a bit failure is present on the incoming data, the reason for this is, that the encoder generates a hamming distance of 3 to the data.
Note: since a have no SVN yet, I copied the source code to word files which can be found in the download area.