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Personal page of Shawn Tan
| Username | sybreon |
| Fullname | Shawn Tan |
| Email | shawn.tan@a... |
| City | Cambridge |
| Country | GB |
| Account created | 20-Feb-2003 09:48:26 |
| Last logged in | 10-Jul-2008 16:57:21 |
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Skils
Visit www.aeste.net to register for mailing lists and to submit bug reports and feature requests.
Projects
ae68
A clean room implementation of an M68K binary compatible processor core. It has been extensively simulated using Icarus Verilog 0.8.2 and GPLCVER 2.11a to confirm functionality. Simulation C code is compiled using GCC.
aeMB
A clean room implementation of an EDK3.2 binary compatible Microblaze processor core. It is FPGA proven and has been extensively simulated using Icarus Verilog 0.8.5 and GPLCVER 2.11a to confirm performance. Simulation code is compiled using GCC 3.4.1 ( Xilinx EDK 8.1.01 Build EDK_I.19.4 061107). Synthesised with 38k gates @ 136MHz on a Virtex4 with ISE.
ae18
A synthesizable core of the PIC18 cpu. It is capable of executing all PIC18 codes. It has been extensively simulated using Icarus Verilog 0.8.2 and GPLCVER 2.11a to confirm performance. The code is compiled using SDCC 2.5 and GPASM 0.13.4. Synthesised with 25k gates @ 50MHz on a Spartan3 with ISE.
K68
A 68k binary compatible, CRISC processor. It supports all 12 addressing modes and most 68K instructions.
News
New aeMB Core Available
New AE18 Available
aeMB released
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