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Message
From: Tom Hawkins<tom@c...>
Date: Mon May 23 16:18:57 CEST 2005
Subject: [oc] fft core with quartus
Giovanni Germani wrote:
> Hi!!
> Thanks a lot for your answer, but I'm still having problems...
> Can you tell me how must I set: reset_i, sync_i, enable_i, data_0_i, data_1_i ??
The reset_i and enable_i control the whole machine -- you can tie them
to 0 and 1 repectively.
> And why there are two data input?? Are they real and img part?
No, they are two different, consecutive data points. Thus, a 1024 point
FFT is loaded in 512 clock cycles.
Each data point has it's own real and img part (real are the MSBs and
img are the LSBs).
-Tom
> Thanks in advance!!
>
> 2005/5/23, Tom Hawkins <tom@c...>:
>
>>cagliostro82@g... wrote:
>>
>>>Hello,
>>>
>>>I'm trying to simulate CF FFT core under Altera Quartus 4.2.
>>>Compilation is succesfull, but I can't use it correctly because I don't
>>>know anything about input and output...
>>>What are Data_0, Data_1, Sync_in, Sync_out ... ????
>>
>>Pulse Sync_in, then on the next clock cycle start feeding the data set
>>in on Data_0_in and Data_1_in (2 data points per cycle). The output
>>data (Data_0_out, Data_1_out) starts streaming out one cycle after the
>>Sync_out pulse.
>>
>>BTW, data sets can be input without interruption, i.e. by pulsing
>>Sync_in on the last two data points of the previous set.
>>
>>-Tom
>>
>>
>>
>>>Please someone help me!!!
>>>
>>>
>>>_______________________________________________
>>>http://www.opencores.org/mailman/listinfo/cores
>>>
>>>
>>
>>_______________________________________________
>>http://www.opencores.org/mailman/listinfo/cores
>>
>
>
> _______________________________________________
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