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    Navigation: All forums > Cores > Message List > Message Post

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    From: Salvador Eduardo Tropea<salvador@i...>
    Date: Mon Apr 18 15:31:14 CEST 2005
    Subject: [oc] i2c slave model
    Top
    tom.houtmeyers@b... wrote:

    >Hi,
    >
    >I am also looking for a I2C slave in VHDL, would it be possible to get a
    >copy of it?
    >
    >
    For synthesis or just testbench?
    The http://www.opencores.org/projects/i2c/ project implements an I2C
    memory (slave) for the testbench. The code is in Verilog, but can be
    translated to VHDL.

    SET

    --
    Salvador Eduardo Tropea (SET). (Electronics Engineer)
    Visit my home page: http://welcome.to/SetSoft or
    http://www.geocities.com/SiliconValley/Vista/6552/
    Alternative e-mail: set@c... set@i...
    Address: Curapaligue 2124, Caseros, 3 de Febrero
    Buenos Aires, (1678), ARGENTINA Phone: +(5411) 4759 0013




    ReferenceAuthor
    [oc] i2c slave modelTom houtmeyers

     
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