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Message
From: ankit.raizada at gmail.com<ankit.raizada@g...>
Date: Mon Apr 11 02:15:19 CEST 2005
Subject: [oc] Fast shared bus in FPGA.
I have a microprocessor core (Plasma) and a number of other cores
which i want to connect with the Plasma core sharing address and data
lines together, as the data lines will be driven by multiple drivers(only
one at a time) I wonder what is the proper way of implementing this in
FPGA. Two ways i have in my mind is (1) to use a daisy chain kind of
connection and connect the cores one-at-back-of-other kind of fassion
(2) to make a shared bus using tristate logic. Anyone having experience
in this regard may please suggest something to me.
PS: Sorry if this sounds as a very basic problem, I happen to be a
freshman in I.T. and doing this as a part of my hobby project hence i
dont have much experience in this regard.
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