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Message
From: abalaku at clemson.edu<abalaku@c...>
Date: Sun Apr 10 01:28:00 CEST 2005
Subject: [oc] Cycles in a design
Hi, I am using Xilinx ISE 7.1i to run a design in Verilig for power consumption. I am using ModelSim simulator. I need to find out the number of cycles for which my design runs i.e the number of cycles that the design takes. How can I do this. Will ISE or ModelSim give me an estimate of this or do i have to use any other tool
Thanks, Arvind
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