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    Navigation: All forums > Cores > Message List > Message Post

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    From: bj at waconsultants.com<bj@w...>
    Date: Fri Apr 1 12:23:41 CEST 2005
    Subject: [oc] i2c project
    Top
    Hello All

    I am a recruiter based in the UK - I am looking for a number of Digital
    and Analog IC design and layout engineers for contract and permanent
    work in Europe.

    Apologies for this somewhat informal approach, but if anyone is looking
    for work please do get in touch

    Bruce Jones
    bj@w...

    ----- Original Message -----
    From: "Frédéric Renet" <f.renet@m...>
    To: cores@o...
    Date: Mon, 17 Jul 2000 11:32:38 +0200
    Subject: Re: [oc] i2c project

    >
    >
    >
    > >
    > > Hi Mr Renet,
    > >
    > > I 'd like to participate at your project. I am an ASIC
    > designer, i 'd like to get involved in various design.
    > >
    >
    > Hi to all,
    >
    > After some month of silence for both professional and personnal
    > reasons i'm back.
    >
    > For I2C core the original idea was to use the block diagram from
    > the motorola MBUS (found in the ColdFire Family) because it's
    > quite clear and translate easily in states machine.
    >
    > I found that Xilinx (formely ColdRunner) had the same idea, and
    > they offer a VHDL master/slave core in one of their application
    > note
    > but there is no information about license. It's really difficult
    > (at least
    > for me) to not reuse the code i've seen for this function, so the
    > question is can we take the code from xilinx or is it worth to look
    > at
    > a different approach ?
    >
    >
    > Frédéric Renet
    > Mipsys
    > 19c Av des Indes
    > 91969 Les Ulis (France)
    > Tel: +33 1 64 86 26 00
    > Fax: +33 1 64 86 26 09
    >

     
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