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    Navigation: All forums > Cores > Message List > Message Post

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    From: Tom Tierens<tti@d...>
    Date: Thu Mar 31 10:37:30 CEST 2005
    Subject: [oc] OCIDE testbench useless???
    Top
    Hello Mark,

    You might want to look at ata_device.v and make some changes:
    more specifically at :
    always @(posedge ata_dior)
    begin
    dout = mem[ addr ];
    dout_en = 1;
    end

    always @(posedge ata_dior)
    begin
    dout_en = 0;
    end

    This code somewhat gives a problem when simulating in modelsim
    Changing it to the following might do the trick:

    always @(posedge ata_dior)
    begin
    assign dout = mem[ addr ];
    dout_en = 1;
    end

    always @(posedge ata_dior_) //<--- ;-)
    begin
    dout_en = 0;
    end

    hope this helps ;-)

    Tom Tierens





    Mark McDougall wrote:

    > Is there anybody who has successfully used the abovementioned?
    >
    > I've had no end of problems with it.
    >
    > Seems it's not testing read-back data from the simulated device
    > properly. Even though the data comes back ZZZZ all the tests pass.
    >
    > Would like to hear from anyone who has actually gotten this to work.
    >
    > Regards,
    >

    ReferenceAuthor
    [oc] OCIDE testbench useless???Mark McDougall

    Follow upAuthor
    [oc] OCIDE testbench useless???Mark McDougall

     
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