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Message
From: Guy Hutchison<ghutchis@g...>
Date: Wed Jan 12 23:59:49 CET 2005
Subject: [oc] Choosing a Fabrication Process
On Wed, 12 Jan 2005 22:03:48 +0000, Shawn Tan Ser Ngiap
<shawn.tan@a...> wrote:
> Hi everyone,
>
> I've got a question regarding choosing a fabrication process.. Let us imagine
> for a moment that there is a fab out there with all possible processes
> imaginable and is really cheap (a perfect fab).. I'm interested to know what
> factors should be considered when choosing the process..
>
> - How do we decide if we want to use 0.35 or 0.25 or 0.18 or 0.13 or any other
> size for that matter??
Process is generally chosen on basis of price, so your perfect fab is
not a good example. :) Newer generation processes give lower
per-unit cost and power consumption, at a cost of higher NRE.
> - Does it matter if a design is fully digital/fully analog/mixed??
Yes, but analog is a special case in almost every process... Analog
parts are typically fabbed in larger processes that are better
characterized and less expensive to fix if you screw up.
> - Does power (W) and supply (V) come into the picture??
The max and min voltages go down as your feature size gets smaller, so yes.
> - Does speed (MHz/GHz) come into the picture??
Smaller processes are faster.
> - How do we decide which foundry/fab to use??
What are your requirements? What skills does your team have? If you
haven't fabbed a chip before, you almost certainly want to go with
someone who handles your back-end (IBM, Agilent, LSI Logic).
> - Any other things to consider??
Depending on how much analog logic you have, consider doing your
design in an FPGA and doing an FPGA->ASIC conversion through Orbit or
someone similar.
> I'm about to go down the full-custom analogue/mixed path and I'd like to have
> some idea of what to expect...
Honestly, I'm not trying to put a downer on things, but if you're
seriously going to design a full-custom chip, you shouldn't be asking
these questions. Most of this list is Chip Design 101, and custom
analog silicon is the Deep Voodoo of chip design.
Good Luck,
Guy
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