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Message
From: Stuart Brorson<sdb@c...>
Date: Tue Jan 11 13:41:32 CET 2005
Subject: [oc] I2V slave implemantation in VHDL
Hi Ranga --I'd be happy to supply you with an I2C slave core. I'll just do a
simple translation of the Verilog version on Opencores.
First you need to arrange a bank check, drawn on an American bank, for
US$3500. Send me the check, and when it clears I'll be happy to e-mail
you the source files. I'll send you the address of-line, if you agree
to these terms.
By the way, I'll be happy to throw in the testbench for free!
Your pal,
Stuart
>
> Hi All,
>
> any body can share the I2C slave model for implementing in VHDL? It will
> be more helpful if u can giveme the testbech also..
>
> thanks in advance..
>
> S.RANGA REDDY
> _______________________________________________
> http://www.opencores.org/mailman/listinfo/cores
>
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