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Message
From: Andres Trapanotto<andres_t@i...>
Date: Tue Dec 7 13:38:29 CET 2004
Subject: [oc] Wishbone interface between two devices
Hi Bumkele!
You can see the Wishbone specification and you'll find that Wishbone is
conceived as a System *On* *Chip* Interconnect Architecture. So you'll find it
SO useful as is.
If you like to interconect an Wishbone Compatible IP with an external
Microprocessor, and your Microprocessor isn't Wishbone Compatible you'll have
to put your IP Core and a Wishbone-to-MicroprocessorArchitecture Bridge boht
togheter in a FPGA :)
Best regards,
bumkele@y... escribió:
> Hello
>
> I have seen that the majority of the available IP cores are using the
> wishbone interface.
> But I must implement an ethernet MAC core (for example) in a FPGA
> with an external microprocessor. In fact, I only have a standard
> memory interface between my FPGA and the Microprocessor.
>
> Is the Wishbone interface usable and How to interface the two components?
>
> Thanks
>
> Bumkele
>
--
Técnico Andrés Trapanotto
INSTITUTO NACIONAL DE TECNOLOGÍA INDUSTRIAL
Centro de Investigación Telecomunicaciones, Electrónica e Informática
Teléfono (54 11) 4724 6300 Interno 6362
andres_t@i...
___________________________________________
0800 444 4004 | www.inti.gov.ar
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