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Amongst a huge restructuration, there's now a small PDF file, which

At 15:54 2004-08-22 +0200, markus@r... wrote:
>Amongst a huge restructuration, there's now a small PDF file, which 
>tries to collect the basic things of the project: 
> 
>http://reaaliaika.net/download/procmem.000.sxw.pdf 

Hi Markus,

I've followed this thread for a while. Your ideas sound interesting
I think, but note that I'm not any kind of expert on processor
architecture.

I am however a hardware developer, and as such, one thing strikes me
when I read about your ideas; Isn't it so that your architecture
actually IS the architecture of an FPGA? Or very much like it anyway,
might be that the FPGA architectures have even simpler processing cells
than the ones you have in mind? But they do have an instruction register
(the LUT programming), a result register (output flip-flops), and read
connections to their neighbours (the routing, even though this is more
complicated in the FPGA case).

You then have to excuse my ignorance because I have not had time to
in detail try to understand your ideas for programming this processor,
but from what I've read in this thread I got the impression that you're
thinking in the way of a programming language with lots of parallellism.
Sounds quite a lot like hardware design, on RTL or somewhat higher level,
to me... The RTL code can be seen as a "program" for an FPGA, the compiler
then being the synthesis and place-and-route tools.

Interesting also that you call it a "processing memory", this name also
fits quite good for an (SRAM-based) FPGA... Which is basically a memory
with some processing facilities added (the people developing the FPGAs
might not agree completely with this description...  ;-)

Do you think that this interpretation of your ideas makes any sense?
Maybe the fact that the processing cells you're thinking of are much
more advanced than the current FPGA macrocells really adds a new
dimension with regards to how the processor is programmed and so on?

Anyway, if my comparison stands, you probably can take some inspiration
from hardware design and the associated tools. And maybe also the other
way around in the future...

(Take a look at e.g. "handel-C" from Celoxica, which is C with extensions
for parallellism. They have a compiler for it that takes it all the way
to hardware. They claim it is a very efficient way to design hardware. I
don't know about that though...   :)

Good luck with your project, best regards
Gunnar Dahlgren
ASIC designer @ Axis Communications AB, Sweden

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