|
Message
From: Hotmail<midgleyben@h...>
Date: Wed Jun 23 23:13:20 CEST 2004
Subject: [oc] Help Wanted - VHDL Parser Construction
I have been looking into VHDL as a 'soft' language, my background is embedded software and my experience/knowledge of vhdl is limited but I am familiar with the basics. I would like to begin construction of a vhdl parse tool but I am unable to find any really usefull information on a standard output for a vhdl parser. I have the language reference manual and have the bnf (syntatic description) which would allow me to get as far as tokenising an input file and applying rules but ultimately I should be able to feed the output of the parse into a synthesis tool.. (?) I have found some information refering to vif (vhdl intermediate format) which I believe is proprietry (please correct me if I am wrong) but there must be a standardised interface established ISO,ANSI......GNU? If anyone has any information or pointers I would like to hear from you.Thanks all Ben
-------------- next part --------------
An HTML attachment was scrubbed...
URL: attachment.htm
|
 |
Browse
